In computer flash memory such as might be used in, e.g., digital cameras, cellular telephones, and portable computing devices, a flash memory core containing a matrix of memory cells is surrounded by a periphery containing peripheral circuits. The cells in the core assume physical states which represent bits of data. Consequently, by configuring the core cells appropriately, data may be stored in the core and subsequently read by detecting the physical state of one or more core cells.
To enable the individual cells to maintain the physical state with which it has been programmed, each cell must be isolated from its neighboring cells. In the case of the peripheral area, isolation is achieved by a method referred to in the art as local oxidation of silicon, or "LOCOS". LOCOS isolation requires disposing a silicon oxide insulator region between active regions. While acceptable for isolating the peripheral area, however, LOCOS isolation is less than desirable for core array isolation. This is because it is desirable to minimize the core cell area to increase memory density, and the LOCOS isolation tends to encroach on the core memory cells, thereby decreasing core active area (and, hence, memory) density.
Accordingly, a dry plasma etch process using groove insulators such as CVD oxides or TEOS has been developed for isolating flash memory core memory cells from each other. In this process, a trench that has a flat bottom and nearly vertical side walls (and, hence, that is shaped somewhat like a flat "U") is formed in the silicon between core memory elements by directing a plasma beam into the silicon. The trench is filled with CVD oxides during etching. As recognized by the present invention, however, it is possible to establish isolation trenches using relatively simple wet etching processes.
Furthermore, during dry etching conductive dopant must be implanted into the wall of the trench by bombarding the trench with a dopant beam. This is to facilitate electrical connections to source regions of transistors subsequent to trench formation. While effective for facilitating transistor source electrical connections, to dope the almost vertical wall of the U-shaped trench the dopant beam source must be angled with respect to the vertical axis of the trench. This in turn requires that the beam source be moved about the periphery of the trench to obtain complete coverage of the wall during doping, or alternatively that the flash memory core be moved relative to the dopant source to achieve the same relative motion effect. As recognized herein, such a doping procedure complicates the fabrication process. As further recognized herein, wet etching can be used to form a trench that is relatively easy to dope.
Accordingly, it is an object of the present invention to provide a method and system for isolating core memory elements of a computer flash memory device. Another object of the present invention is to provide a method and system for isolating core memory elements of a computer flash memory device which does not require the use of dry etching. Still another object of the present invention is to provide a method and system for isolating core memory elements of a computer flash memory device by establishing isolation grooves between the trenches such that the walls of the isolation grooves can be easily and conveniently doped. Yet another object of the present invention is to provide a method and system for isolating core memory elements of a computer flash memory device that is easy to use and cost effective. Another object of the present invention is to provide a method and system for isolating core memory elements of a computer flash memory device that facilitates electrical connection to sources of transistors after trench formation.